gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 135
gc80c510
Manufacturer Part Number
gc80c510
Description
Eprom/rom 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C510.pdf
(211 pages)
- Current page: 135 of 211
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DEC
MiDAS1.1 Family
DEC A
DEC Rn
Description:
Operation:
Operation:
Encoding:
Encoding:
byte
Function:
Example:
Cycles:
Cycles:
Bytes:
Bytes:
Decrement
The
0FFh.
No flags are affected. Four operand addressing modes are allowed: accumulator,
register, direct or register-indirect.
Note: When this instruction is used to modify an
original port data will be read from the output data latch, not the input pins.
Register 0 contains 7Fh (01111111b). Internal RAM locations 7Eh and 7Fh contain 00h
and 40h, respectively. The instruction sequence
DEC @R0
DEC R0
DEC @R0
will leave register 0 set to 7Eh and internal RAM locations7Eh and 7Fh set to 0FFh and
3Fh.
1
1
DEC
(A)
1
1
DEC
(Rn)
0
0
←
variable indicated is decremented by 1. An original value of 00h will underflow to
←
0
0
(A) – 1
(Rn) – 1
0
0
1
1
0 1 0 0
1
r
Page 135 of 211
r
r
output port, the value used as the
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