gc80c510 CORERIVER Semiconductor, gc80c510 Datasheet - Page 180
gc80c510
Manufacturer Part Number
gc80c510
Description
Eprom/rom 8-bit Turbo Microcontrollers
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC80C510.pdf
(211 pages)
- Current page: 180 of 211
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XCH
XCH A, Rn
XCH A, direct
XCH A, @Ri
Description:
Operation:
Operation:
Operation:
Encoding:
Encoding:
Encoding:
A, <byte>
Function:
Example:
Cycles:
Cycles:
Cycles:
Bytes:
Bytes:
Bytes:
Exchange Accumulator with byte variable
XCH leads the Accumulator with the contents of the indicated variable, at the
same time writing the original Accumulator contents to the indicated variable.
The source/destination operand can use register, direct, or register-indirect
addressing.
R0 contains the address 20h. The Accumulator holds the value 3Fh
(00111111b). Internal RAM location 20h holds the value 75h (01110101b). The
instruction,
XCH A, @R0
will leave RAM location 20h holding the values 3Fh (00111111b) and 75h
(01110101b) in the accumulator.
1
1
XCH
(A)
2
2
XCH
(A)
1
1
XCH
(A)
1
1
1
↔
↔
↔
1
1
1
(Rn)
(direct)
((Ri))
0
0
0
0
0
0
1
0 1 0 1
0
Page 180 of 211
1
r
r
1
r
i
direct address
Appendix A: Instruction Set
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