mpc8568e Freescale Semiconductor, Inc, mpc8568e Datasheet - Page 77

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mpc8568e

Manufacturer Part Number
mpc8568e
Description
Mpc8568e Powerquicc Iii Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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The eye diagram must be valid for any 250 consecutive UIs.
A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is
created using all edges of the 250 consecutive UI in the center of the 3500 UI used for calculating the TX
UI.
14.5.1
The AC timing and voltage parameters must be verified at the measurement point, as specified within 0.2
inches of the package pins, into a test/measurement load shown in
Freescale Semiconductor
MPC8568E/MPC8567E PowerQUICC III™ Integrated Processor Hardware Specifications, Rev. 0
Compliance Test and Measurement Load
Figure 50. Minimum Receiver Eye Timing and Voltage Compliance Specification
The reference impedance for return loss measurements is 50. to ground for
both the D+ and D- line (that is, as measured by a Vector Network Analyzer
with 50. probes—see
optional for the return loss measurement.
The allowance of the measurement point to be within 0.2 inches of the
package pins is meant to acknowledge that package/board routing may
benefit from D+ and D– not being exactly matched in length at the package
pin boundary.
Figure
51). Note that the series capacitors, CTX, are
NOTE
NOTE
Figure
51.
PCI Express
77

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