mpc8568e Freescale Semiconductor, Inc, mpc8568e Datasheet - Page 22

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mpc8568e

Manufacturer Part Number
mpc8568e
Description
Mpc8568e Powerquicc Iii Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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DDR and DDR2 SDRAM
Figure 3
from t
6.2.2
22
At recommended operating conditions.
MCK[n] cycle time, MCK[n]/MCK[n] crossing
ADDR/CMD output setup with respect to MCK
ADDR/CMD output hold with respect to MCK
MCS[n] output setup with respect to MCK
CISKEW
provides the input timing diagram for the DDR SDRAM interface. t
MPC8568E/MPC8567E PowerQUICC III™ Integrated Processor Hardware Specifications, Rev. 0
MDQS[n]
MCK[n]
MCK[n]
MDQ[x]
DDR SDRAM Output AC Timing Specifications
. See
Parameter
Table 19
Table 20. DDR SDRAM Output AC Timing Specifications
footnote 2.
Figure 3. DDR SDRAM Input Timing Diagram
533 MHz
400 MHz
333 MHz
533 MHz
400 MHz
333 MHz
533 MHz
400 MHz
333 MHz
t
t
MCK
DISKEW
Symbol
t
t
t
DDKHAS
DDKHAX
DDKHCS
t
MCK
D0
1
D1
t
3.75
1.48
1.95
2.40
1.48
1.95
2.40
1.48
1.95
2.40
DISKEW
Min
DISKEW
Max
10
Freescale Semiconductor
can be calculated
Unit
ns
ns
ns
ns
Notes
2
3
7
3
7
3
7

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