mpc8568e Freescale Semiconductor, Inc, mpc8568e Datasheet - Page 57

• Manufacturer Part Number: mpc8568e
• Description: Mpc8568e Powerquicc Iii Processor
• Manufacturer: Freescale Semiconductor, Inc

11.2
Table 47
Freescale Semiconductor
At recommended operating conditions with OV
At recommended operating conditions with OV
Capacitance for each I/O pin
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. Refer to the MPC8568E PowerQUICC III Integrated Communications Processor Reference Manual for information on the
3. I/O pins will obstruct the SDA and SCL lines if OV
SCL clock frequency
Low period of the SCL clock
High period of the SCL clock
Setup time for a repeated START condition
Hold time (repeated) START condition (after this period, the first clock
pulse is generated)
Data setup time
Data input hold time:
Data output delay time
Set-up time for STOP condition
Bus free time between a STOP and START condition
Noise margin at the LOW level for each connected device (including
hysteresis)
Noise margin at the HIGH level for each connected device (including
hysteresis)
digital filter used.
provides the AC timing parameters for the I
I
2
MPC8568E/MPC8567E PowerQUICC III™ Integrated Processor Hardware Specifications, Rev. 0
C AC Electrical Specifications
Parameter
Parameter
Table 46. I
Table 47. I
DD
DD
2
C DC Electrical Characteristics (continued)
of 3.3 V ± 5%.
of 3.3V
CBUS compatible masters
2
±
C AC Electrical Specifications
DD
5%. All values refer to V
is switched off.
I
2
C bus devices
2
C interfaces.
Symbol
IH
Symbol
C
t
t
t
t
t
t
t
I2PVKH
(min) and V
I2SVKH
I2DVKH
I2KHDX
I2DXKL
I2OVKL
I2SXKL
I
t
t
V
V
f
I2CH
I2CL
I2C
NH
NL
1
IL
Min
0.1 × OV
0.2 × OV
(max) levels (see
—
Min
100
1.3
0.6
0.6
0.6
0.6
1.3
0
—
—
0
2
DD
DD
Max
10
Table
0.9
Max
400
—
—
—
—
—
—
—
—
—
—
—
46).
3
Unit Notes
pF
Unit
kHz
μs
μs
μs
μs
ns
μs
μs
μs
μs
V
V
—
I
57
2
C