mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 206

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mc68hc912bd32

Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
FIFO Size Register
(FSIZR)
Byteflight™ Module
MC68HC912BD32 Rev 1.0
FSIZR
$xx01
RESET
W
R
NOTE:
BIT 7
0
0
FSIZ4:0 — FIFO Size Bits
The FSIZR register can only be written if the SFTRES bit in the Module
Configuration register is set.
BIT 6
These bits are used to configure the FIFO. The number of buffers,
starting from buffer ‘0’, assigned to the receive FIFO can be selected.
The corresponding buffer(s) must be assigned as Receive buffer by
the CFG-bits in the message buffer control register(s).
Freescale Semiconductor, Inc.
Figure 38 FIFO Size Register (FSIZR)
0
0
For More Information On This Product,
BIT 5
Go to: www.freescale.com
0
0
Byteflight™ Module
FSIZ[4:0]
0 0000
0 0001
0 0010
0 0011
10000
11111
01111
:
FSIZ4*
BIT 4
0
Table 46 FIFO Size
No FIFO
buffer 0
buffers 0, 1
buffers 0- 2
:
buffers 0-14
buffers 0-15
buffers 0-15
buffers 0-15
FSIZ3*
BIT 3
0
FIFO Size
FSIZ2*
BIT 2
0
FSIZ1*
BIT 1
0
FSIZ0*
BIT 0
0
36-sibus

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