mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 134

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mc68hc912bd32

Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
OC7M — Output Compare 7 Mask Register
TCNT — Timer Count Register
OC7D — Output Compare 7 Data Register
Standard Timer Module
MC68HC912BD32 Rev 1.0
RESET:
RESET:
RESET:
OC7M7
OC7D7
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
OC7M6
OC7D6
14
6
0
6
0
6
6
0
Read or write anytime.
The bits of OC7M correspond bit-for-bit with the bits of timer port
(PORTT). Setting the OC7Mn will set the corresponding port to be an
output port regardless of the state of the DDRTn bit when the
corresponding TIOSn bit is set to be an output compare. This does not
change the state of the DDRT bits.
Read or write anytime.
The bits of OC7D correspond bit-for-bit with the bits of timer port
(PORTT). When a successful OC7 compare occurs, for each bit that
is set in OC7M, the corresponding data bit in OC7D is stored to the
corresponding bit of the timer port.
When the OC7Mn bit is set, a successful OC7 action will override a
successful OC[6:0] compare action during the same cycle; therefore,
the OCn action taken will depend on the corresponding OC7D bit.
A full access for the counter register should take place in one clock
cycle. A separate read/write for high byte and low byte will give a
different result than accessing them as a word.
Read anytime.
Freescale Semiconductor, Inc.
For More Information On This Product,
OC7M5
OC7D5
13
5
0
5
5
0
5
0
Go to: www.freescale.com
Standard Timer Module
OC7M4
OC7D4
12
4
0
4
0
4
4
0
OC7M3
OC7D3
11
3
0
3
0
3
3
0
OC7M2
OC7D2
10
2
0
2
0
2
2
0
OC7M1
OC7D1
1
0
1
0
1
9
1
0
OC7M0
OC7D0
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
0
0
0
$0084–$0085
$0082
$0083
4-timer

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