mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 168

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mc68hc912bd32

Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
PORTS — Port S Data Register
DDRS — Data Direction Register for Port S
Port S
Serial Interface
MC68HC912BD32 Rev 1.0
Function
RESET:
Pin
DDS7
Bit 7
Bit 7
PS7
SS
CS
0
DDS6
SCK
PS6
6
6
0
In all modes, port S bits PS[7:0] can be used for either general-purpose
I/O, or with the SCI and SPI subsystems. During reset, port S pins are
configured as high-impedance inputs (DDRS is cleared).
Note that some slave devices are very simple and either accept data
from the master without returning data to the master or pass data to
the master without requiring data from the master.
PORTS can be read anytime. When configured as an input, a read will
return the pin level. When configured as output, a read will return the
latched output data. Writes do not change pin state when pin
configured for SPI or SCI output.
After reset all bits are configured as general-purpose inputs.
Port S shares function with the on-chip serial systems (SPI0 and
SCI0).
Read or write anytime.
After reset, all general-purpose I/O are configured for input only.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Configure the corresponding I/O pin for input only
1 = Configure the corresponding I/O pin for output
MOMI
DDS5
MOSI
PS5
5
5
0
Go to: www.freescale.com
DDS4
MISO
SISO
PS4
Serial Interface
4
4
0
DDS3
PS3
I/O
3
3
0
DDS2
PS2
I/O
2
2
0
DDS1
TXD0
PS1
1
1
0
RXD0
DDS0
Bit 0
Bit 0
PS0
0
$00D6
$00D7
22-sint

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