mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 160

• Manufacturer Part Number: mc68hc912bd32
• Description: 16-bit Device Composed Of Standard On-chip Peripherals
• Manufacturer: Freescale Semiconductor, Inc

Serial Interface
MC68HC912BD32 Rev 1.0
SP0BR SPI BAUD RATE REGISTER
2
4
INTERRUPT
REQUEST
SPI
8
(SAME AS E RATE)
MCU P CLOCK
16
SELECT
DIVIDER
32
SP0SR SPI STATUS REGISTER
Figure 21 Serial Peripheral Interface Block Diagram
SPI CONTROL
64
is effectively exchanged between the master and the slave. Data written
to the SP0DR register of the master becomes the output data for the
slave and data read from the SP0DR register of the master after a
transfer operation is the input data from the slave.
A clock phase control bit (CPHA) and a clock polarity control bit (CPOL)
in the SP0CR1 register select one of four possible clock formats to be
used by the SPI system. The CPOL bit simply selects non-inverted or
inverted clock. The CPHA bit is used to accommodate two
fundamentally different protocols by shifting the clock by one half cycle
or no phase shift.
128
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SP0DR SPI DATA REGISTER
Serial Interface
SHIFT CONTROL LOGIC
8-BIT SHIFT REGISTER
READ DATA BUFFER
INTERNAL BUS
MSTR
SPE
SP0CR1 SPI CONTROL REGISTER 1 SP0CR2 SPI CONTROL REGISTER 2
CLOCK
LOGIC
CLOCK
SWOM
LSBF
S
M
M
S
CONTROL
S
M
LOGIC
PIN
MISO
MOSI
PS4
SCK
PS7
PS5
PS6
SS
14-sint