mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 153

• Manufacturer Part Number: mc68hc912bd32
• Description: 16-bit Device Composed Of Standard On-chip Peripherals
• Manufacturer: Freescale Semiconductor, Inc

7-sint
LOOPS RSRC
0
1
1
1
1
1
1
x
0
0
0
1
1
1
DDS1(3)
x
0
1
1
0
1
1
M — Mode (select character format)
WAKE — Wakeup by Address Mark/Idle
ILT — Idle Line Type
PE — Parity Enable
Determines which of two types of idle line detection will be used by
the SCI receiver.
In the short mode, the SCI circuitry begins counting ones in the search
for the idle line condition immediately after the start bit. This means
that the stop bit and any bits that were ones before the stop bit could
be counted in that string of ones, resulting in earlier recognition of an
idle line.
In the long mode, the SCI circuitry does not begin counting ones in the
search for the idle line condition until a stop bit is received. Therefore,
the last byte’s stop bit and preceding “1” bits do not affect how quickly
an idle line condition can be detected.
Freescale Semiconductor, Inc.
WOMS
For More Information On This Product,
0 = One start, eight data, one stop bit
1 = One start, eight data, ninth data, one stop bit
0 = Wake up by IDLE line recognition
1 = Wake up by address mark (last data bit set)
0 = Short idle line mode is enabled.
1 = Long idle line mode is detected.
0 = Parity is disabled.
1 = Parity is enabled.
0/1
x
0
1
x
0
1
Table 30 Loop Mode Functions
Go to: www.freescale.com
Single wire mode for the receiving and transmitting (open-drain)
(the pin is used as receiver input only, TXD = High Impedance)
LOOP mode without TXD output (TXD = High Impedance)
Serial Interface
(the output is also fed back to receiver input, CMOS)
LOOP mode with TXD output (open-drain)
LOOP mode with TXD output (CMOS)
Single wire mode without TXD output
Single wire mode with TXD output
Function of Port S Bit 1/3
Normal Operations
Serial Communication Interface (SCI)
MC68HC912BD32 Rev 1.0
Serial Interface