mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 236
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mc68hc912d60c
Manufacturer Part Number
mc68hc912d60c
Description
Hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC912D60C.pdf
(460 pages)
- Current page: 236 of 460
- Download datasheet (5Mb)
Enhanced Capture Timer
TSCR — Timer System Control Register
Technical Data
236
RESET:
Bit 7
TEN
0
TSWAI
6
0
Read or write anytime.
TEN — Timer Enable
TSWAI — Timer Module Stops While in Wait
TSBCK — Timer and Modulus Counter Stop While in Background Mode
TFFCA — Timer Fast Flag Clear All
If for any reason the timer is not active, there is no ÷64 clock for the
pulse accumulator since the E÷64 is generated by the timer prescaler.
TSWAI also affects pulse accumulators and modulus down counters.
TBSCK does not stop the pulse accumulator.
0 = Disables the main timer, including the counter. Can be used for
1 = Allows the timer to function normally.
0 = Allows the timer module to continue running during wait.
1 = Disables the timer module when the MCU is in the wait mode.
0 = Allows the timer and modulus counter to continue running while
1 = Disables the timer and modulus counter whenever the MCU is
0 = Allows the timer flag clearing to function normally.
1 = For TFLG1($8E), a read from an input capture or a write to the
TSBCK
5
0
reducing power consumption.
Timer interrupts cannot be used to get the MCU out of wait.
in background mode.
in background mode. This is useful for emulation.
output compare channel ($90–$9F) causes the corresponding
channel flag, CnF, to be cleared. For TFLG2 ($8F), any access
to the TCNT register ($84, $85) clears the TOF flag. Any
access to the PACN3 and PACN2 registers ($A2, $A3) clears
the PAOVF and PAIF flags in the PAFLG register ($A1). Any
access to the PACN1 and PACN0 registers ($A4, $A5) clears
the PBOVF flag in the PBFLG register ($B1). Any access to the
Enhanced Capture Timer
TFFCA
4
0
3
0
2
0
MC68HC912D60A — Rev. 3.1
1
0
Freescale Semiconductor
Bit 0
0
$0086
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