mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 208

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mc68hc912d60c

Manufacturer Part Number
mc68hc912d60c
Description
Hc12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Pulse Width Modulator
Technical Data
208
(ECLK or Scaled ECLK)
CLOCK SOURCE
PWENx
(CLOCK EDGE SYNC)
GATE
SYNC
Figure 13-1. Block Diagram of PWM Left-Aligned Output Channel
PPOL = 0
PPOL = 1
possible to know where the count is with respect to the duty value and
software can be used to make adjustments by turning the enable bit off
and on.
The four PWM channel outputs share general-purpose port P pins.
Enabling PWM pins takes precedence over the general-purpose port.
When PWM channels are not in use, the port pins may be used for
discrete input/output.
RESET
PWCNTx
PWDTY
Pulse Width Modulator
UP/DOWN
8-BIT COMPARE =
8-BIT COMPARE =
CENTR = 0
PWPERx
PWDTYx
PWPER
S
R
Q
Q
PPOLx
MUX
DATA REGISTER
FROM PORT P
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
MUX
DRIVER
TO PIN

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