mc68hc912d60c Freescale Semiconductor, Inc, mc68hc912d60c Datasheet - Page 157

• Manufacturer Part Number: mc68hc912d60c
• Description: Hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

PLLFLG — PLL Flags
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
RESET:
LOCKIF
Bit 7
0
LOCK
6
0
Read anytime, refer to each bit for write conditions.
LOCKIF — PLL Lock Interrupt Flag
LOCK — Locked Phase Lock Loop Circuit
LHIF — Limp-Home Interrupt Flag
LHOME — Limp-Home Mode Status
For Limp-Home mode, see
To clear the flag, write one to this bit in PLLFLG. Cleared in limp-home
mode.
Regardless of the bandwidth control mode (automatic or manual):
Write has no effect on LOCK bit. This bit is cleared in limp-home mode as
the lock detector cannot operate without the reference frequency.
To clear the flag, write one to this bit in PLLFLG.
0 = No change in LOCK bit.
1 = LOCK condition has changed, either from a locked state to an
0 = PLL VCO is not within the desired tolerance of the target
1 = After the phase lock loop circuit is turned on, indicates the PLL
0 = No change in LHOME bit.
1 = LHOME condition has changed, either entered or exited limp-
0 = MCU is operating normally, with EXTALi clock available for
1 = Loss of reference clock. CGM delivers PLL VCO limp-home
5
0
0
unlocked state or vice versa.
frequency.
VCO is within the desired tolerance of the target frequency.
home mode.
generating clocks or as PLL reference.
frequency to the MCU.
Clock Functions
4
0
0
Limp-Home and Fast STOP Recovery
3
0
0
Limp-Home and Fast STOP Recovery modes
2
0
0
LHIF
1
0
LHOME
Bit 0
0
Clock Functions
Technical Data
modes.
$003B
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