ez80l92 ZiLOG Semiconductor, ez80l92 Datasheet - Page 31

• Manufacturer Part Number: ez80l92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Register Map
Table 3. Register Map
PS013014-0107
Address
(hex)
Programmable Reload Counter/Timers
0080
0081
0082
0083
0084
0085
0086
Programmable Reload Counter/Timers
0087
0088
Mnemonic
TMR0_CTL
TMR0_DR_L
TMR0_RR_L
TMR0_DR_H
TMR0_RR_H
TMR1_CTL
TMR1_DR_L
TMR1_RR_L
TMR1_DR_H
TMR1_RR_H
TMR2_CTL
TMR2_DR_L
TMR2_RR_L
TMR2_DR_H
TMR2_RR_H
All on-chip peripheral registers are accessed in the I/O address space. All I/O operations
employ 16-bit addresses. The upper byte of the 24-bit address bus is undefined during all
I/O operations (ADDR[23:16] =
range
not generated if the address space programmed for the I/O Chip Selects overlaps the
0080h
Registers at unused addresses within the
peripherals are not implemented. Read access to such addresses returns unpredictable
values and Write access produces no effect.
MCU.
0080h
–
00FFh
–
Name
Timer 0 Control Register
Timer 0 Data Register—Low Byte
Timer 0 Reload Register—Low Byte
Timer 0 Data Register—High Byte
Timer 0 Reload Register—High Byte
Timer 1 Control Register
Timer 1 Data Register—Low Byte
Timer 1 Reload Register—Low Byte
Timer 1 Data Register—High Byte
Timer 1 Reload Register—High Byte
Timer 2 Control Register
Timer 2 Data Register—Low Byte
Timer 2 Reload Register—Low Byte
Timer 2 Data Register—High Byte
Timer 2 Reload Register—High Byte
00FFh
address range.
are routed to the on-chip peripherals. External I/O Chip Selects are
UU
). All I/O operations using 16-bit addresses within the
0080h
Table 3
–
00FFh
lists the register map for the eZ80L92
range assigned to on-chip
Reset
(hex)
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
Product Specification
Access
CPU
R/W
R/W
R/W
eZ80L92 MCU
W
W
W
W
W
W
R
R
R
R
R
R
Register Map
Page
No
82
84
85
84
86
82
84
85
84
86
82
84
85
84
86
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