ez80l92 ZiLOG Semiconductor, ez80l92 Datasheet - Page 213

• Manufacturer Part Number: ez80l92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Table 122. External Write Timing
PS013014-0107
Parameter
T
T
T
T
T
T
T
T
T
T
Note: *At the conclusion of a Write cycle, de-assertion of WR always occurs before any change to ADDR, DATA, CSx,
1
2
3
4
5
6
7
8
9
10
or MREQ. In certain applications, the de-assertion of WR can be concurrent with ADDR, DATA, CSx, or MREQ
when buffering is used off-chip.
Description
Clock Rise to ADDR Valid Delay
Clock Rise to ADDR Hold Time
Clock Fall to Output DATA Valid Delay
DATA Hold Time from Clock Rise
Clock Rise to CSx Assertion Delay
Clock Rise to CSx Deassertion Delay
Clock Rise to MREQ Assertion Delay
Clock Rise to MREQ Deassertion Delay
Clock Fall to WR Assertion Delay
Clock Rise to WR Deassertion Delay*
Min
2.4
3.2
2.9
2.8
2.6
1.5
1.4
2.4
—
—
20 MHz (ns)
Max
10.2
10.3
9.7
9.6
6.9
5.0
3.6
—
—
6
Product Specification
Min
2.4
2.4
3.2
2.9
2.8
2.6
1.5
1.4
—
—
50 MHz (ns)
AC Characteristics
Max
10.2
10.3
9.7
9.6
6.9
5.0
3.6
—
—
6
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