ez80l92 ZiLOG Semiconductor, ez80l92 Datasheet - Page 216

• Manufacturer Part Number: ez80l92
• Description: Ez80acclaim Flash Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Table 124. External I/O Write Timing
PS013014-0107
Parameter
T
T
T
T
T
T
T
T
T
T
Note: *At the conclusion of a Write cycle, deassertion of WR always occurs before any change to ADDR, DATA, CSx,
1
2
3
4
5
6
7
8
9
10
or IORQ. In certain applications, the deassertion of WR can be concurrent with ADDR, DATA, CSx, or MREQ
when buffering is used off-chip.
Description
Clock Rise to ADDR Valid Delay
Clock Rise to ADDR Hold Time
Clock Fall to Output DATA Valid Delay
Clock Rise to DATA Hold Time
Clock Rise to CSx Assertion Delay
Clock Rise to CSx Deassertion Delay
Clock Rise to IORQ Assertion Delay
Clock Rise to IORQ Deassertion Delay
Clock Fall to WR Assertion Delay
Clock Rise to WR Deassertion Delay*
WR Deassertion to ADDR Hold Time
WR Deassertion to DATA Hold Time
WR Deassertion to CSx Hold Time
WR Deassertion to IORQ Hold Time
Min
2.3
2.6
2.4
2.6
2.3
1.8
1.6
0.4
0.5
1.2
0.5
2.2
—
—
20 MHz (ns)
Max
10.8
7.7
8.8
7.0
6.3
4.5
4.4
—
—
—
—
—
—
6
Product Specification
Min
2.2
2.3
2.6
2.4
2.6
2.3
1.8
1.6
0.4
0.5
1.2
0.5
—
—
50 MHz (ns)
AC Characteristics
Max.
10.8
7.7
8.8
7.0
6.3
4.5
4.4
—
—
—
—
—
—
6
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