ez80l92 ZiLOG Semiconductor, ez80l92 Datasheet - Page 219
ez80l92
Manufacturer Part Number
ez80l92
Description
Ez80acclaim Flash Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80L92.pdf
(231 pages)
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PS013014-0107
Port Output
READ on Data Bus
EXTAL
General Purpose I/O Port Input Sample Timing
General Purpose I/O Port Output Timing
Input Value
GPIO Input
GPIO Data
Data Latch
GPIO Pin
System
Figure 54
pin is sampled on the rising edge of the system clock. The port value is then available to
the CPU on the second rising clock edge following the change of the port value.
Figure 55
Clock
T
illustrates timing of the GPIO input sampling. The input value on a GPIO port
and
1
Table 125
Figure 54. Port Input Sample Timing
Figure 55. GPIO Port Output Timing
T
CLK
Data Register
Port Value
Changes to 0
Into GPIO
0 Latched
provide timing information for GPIO port pins.
T
CLK
Product Specification
GPIO Data Register
Value 0 Read
by eZ80
T
2
AC Characteristics
213
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