dac1005d650 NXP Semiconductors, dac1005d650 Datasheet - Page 30

• Manufacturer Part Number: dac1005d650
• Description: Dual 10-bit Dac, Up To 650 Msps; 2? 4? And 8? Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
DAC1005D650_1
Product data sheet
10.12 Analog output
Table 38.
Default settings are shown highlighted.
The DAC1005D650 has two output channels each of which produces two complementary
current outputs. These allow the even-order harmonics and noise to be reduced. The pins
are IOUTAP/IOUTAN and IOUTBP/IOUTBN respectively and need to be connected using
a load resistor R
Refer to
of a parallel combination of NMOS current sources, and their associated switches, for
each segment.
The cascode source configuration increases the output impedance of the source, thus
improving the dynamic performance of the DAC by introducing less distortion.
The device can provide an output level of up to 2 V
following stages and the targeted performances.
DAC_OFFSET[8:0]
Decimal
...
0
+1
...
+254
+255
Fig 12. Equivalent analog output circuit (one DAC)
256
255
1
Figure 12
Digital offset adjustment
L
to the 3.3 V analog power supply (V
for the equivalent analog output circuit of one DAC. This circuit consists
Rev. 01 — 28 July 2009
Dual 10-bit DAC, up to 650 Msps; 2 4 and 8 interpolating
AGND
Two’s complement
1 0000 0000
1 0000 0001
...
1 1111 1111
0 0000 0000
0 0000 0001
...
0 1111 1110
0 1111 1111
AGND
IOUTAP/IOUTBP
IOUTAN/IOUTBN
o(p-p)
DDA(3V3)
depending on the application, the
DAC1005D650
Offset applied
...
0
+1
...
+254
+255
V
256
255
1
).
DDA(3V3)
R L
001aah019
R L
© NXP B.V. 2009. All rights reserved.
30 of 41