mt48lc16m16a2tg-7e-it Micron Semiconductor Products, mt48lc16m16a2tg-7e-it Datasheet - Page 72

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mt48lc16m16a2tg-7e-it

Manufacturer Part Number
mt48lc16m16a2tg-7e-it
Description
256mb X4, X8, X16 Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
Figure 52:
PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8
256MSDRAM_2.fm - Rev. L 10/07 EN
DQML, DQMU
COMMAND
BA0, BA1
A11, A12
A0–A9,
DQM/
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
BANK 0
T0
ROW
ROW
Alternating Bank Write Accesses
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD - BANK 0
t RAS - BANK 0
t
t
RC - BANK 0
RRD
t CK
T1
NOP
1. For this example, BL = 4.
2. Requires one clock plus time (7ns or 7.5ns) with auto precharge or 14ns to 15ns with PRE-
3. x16: A9, A11, and A12 = “Don’t Care”
ENABLE AUTO PRECHARGE
CHARGE.
x8: A11 and A12 = “Don’t Care”
x4: A12 = “Don’t Care”
t CMS
t CL
t DS
COLUMN m 3
BANK 0
WRITE
T2
D
IN
t CMH
t CH
t DH
m
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
D
BANK 1
ACTIVE
IN
T4
ROW
ROW
m + 2
t DH
72
t RCD - BANK 1
t DS
D
IN
T5
NOP
m + 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
t WR - BANK 0
ENABLE AUTO PRECHARGE
COLUMN b 3
t DS
BANK 1
WRITE
T6
D
IN
t DH
b
256Mb: x4, x8, x16 SDRAM
t DS
D
NOP
IN
T7
b + 1
t DH
©1999 Micron Technology, Inc. All rights reserved.
t DS
t RP - BANK 0
Timing Diagrams
D
IN
NOP
T8
b + 2
t DH
t DS
D
BANK 0
ACTIVE
T9
ROW
IN
ROW
b + 3
t
t
RCD - BANK 0
WR - BANK 1
DON’T CARE
t DH

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