mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 90
mg84fl54
Manufacturer Part Number
mg84fl54
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
1.MG84FL54.pdf
(113 pages)
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Step 1: Set EN_PLL = 1.
Step 2: Wait for PLL_RDY = 1.
Step 3: Delay 2ms.
Step 4: Set EN_USB = 1.
Step 5: Start to access USB SFRs
In USB operation, device may go into power-down mode by the setting of firmware’s interrupt service routine
after device received a USB suspend event. If device wakeup from power-down mode because of the USB
resume event or any enable wakeup sources, the following configuration sequence must be performed before
accessing USB SFRs:
After wakeup from power-down
Step 0: Wait for PLL_RDY = 1.
Step 1: Delay 2ms.
Step 2: Start to access USB SFRs
EN_PLL and EN_USB are contained in the CKCON2 register, as follows.
CKCON2 (Address=BFH, Clock Control Register 2)
EN_USB: USB function enable control bit.
Set/Clear to enable/disable the USB function.
EN_PLL: PLL enable bit. 1: Enable 0: Disable
PLL_RDY: PLL Ready flag.
It is a read only bit. If this bit is set, indicates the PLL had locked. If cleared, PLL is un-locked.
19.4.1. USB SFR Memory Mapping
The special function registers which are dedicated to the USB operation are grouped in the external memory
address space and share the addresses 0xFF00 to 0xFFFF with the physical external data memory. That is, the
user should use the instruction
SFR memory mapping.
All USB SFRs would be reset by the reset sources as listed in
USB SFRs would be reset when device receive the USB reset event (USB_reset) except DCON, IEN, SIOCTL
registers and CONEN bit in UPCON register.
Table 19-1 USB SFR Memory Mapping
FFF8H
FFF0H
FFE8H
FFE0H
FFD8H
FFD0H
FFC8H
FFC0H
90
7
-
0/8
UADDR
DCON
0/8
6
-
1/9
EPINDEX
EPCON
IEN
UPCON
1/9
OSCDR0
5
“MOVX @DPTR”
2/A
TXSTAT
RXSTAT
UIE
SIOCTL
2/A
MG84FL54B Data Sheet
4
-
3/B
TXDAT
RXDAT
UIFLG
3/B
to access these USB SFRs. The following table shows USB
EN_USB
3
4/C
TXCON
RXCON
UIE1
4/C
EN_PLL
8 Reset Sources
2
5/D
UIFLG1
5/D
PLL_RDY
1
6/E
TXCNT
RXCNT
6/E
(SYS_reset) and the most of
CK_SEL
0
7/F
7/F
MEGAWIN
FFFFH
FFF7H
FFEFH
FFE7H
FFDFH
FFD7H
FFCFH
FFC7H
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