mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 25
mg84fl54
Manufacturer Part Number
mg84fl54
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
1.MG84FL54.pdf
(113 pages)
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signal. See
18 One-Time-Enabled Watchdog Timer
(WDT).
8.4. Software Reset
Writing ‘1’ to bit SWRST will trigger a software reset, which causes the CPU to re-boot from the AP-memory or
the ISP-memory according to the SWBS bit. See the ISPCR register shown below.
ISPCR (Address=E7H, ISP Control Register)
7
6
5
4
3
2
1
0
ISPEN
SWBS
SWRST
Reserved
MISPF
Reserved
MS1
MS0
SWBS: Software Boot Select.
Set/clear to select booting from ISP-memory/AP-memory for software reset.
SWRST: Software Reset bit.
Write ‘1’ to this bit to trigger a software reset.
MEGAWIN
MG84FL54B Data sheet
25
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