mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 14
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mg84fl54
Manufacturer Part Number
mg84fl54
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
1.MG84FL54.pdf
(113 pages)
- Current page: 14 of 113
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5.2. Data Memory
Fig 5-2 shows the internal and external data memory spaces available to the MG84FL54B user. Internal data
memory can be divided into three blocks, which are generally referred to as the lower 128 bytes of RAM, the
upper 128 bytes of RAM, and the 128 bytes of SFR space. Internal data memory addresses are always 8-bit
wide, which implies an address space of only 256 bytes. Direct addresses higher than 7FH access the SFR
space; and indirect addresses higher than 7FH access the upper 128 bytes of RAM. Thus the SFR space and
the upper 128 bytes of RAM occupy the same block of addresses, 80H through FFH, although they are
physically separate entities.
The lower 128 bytes of RAM are present in all 80C51 devices as mapped in Fig 5-3. The lowest 32 bytes are
grouped into 4 banks of 8 registers. Program instructions call out these registers as R0 through R7. Two bits in
the Program Status Word (PSW) select which register bank is in use. This allows more efficient use of code
space, since register instructions are shorter than instructions that use direct addressing. The next 16 bytes
above the register banks form a block of bit-addressable memory space. The 80C51 instruction set includes a
wide selection of single-bit instructions, and the 128 bits in this area can be directly addressed by these
instructions. The bit addresses in this area are 00H through 7FH.
All of the bytes in the Lower 128 can be accessed by either direct or indirect addressing while the Upper 128
can only be accessed by indirect addressing.
Special Function Registers (SFRs) include the Port latches, timers, peripheral controls, etc. These registers can
only be accessed by direct addressing. Sixteen addresses in SFR space are both byte- and bit-addressable.
The bit-addressable SFRs are those whose address ends in 0H or 8H.
Fig 5-2 Data Memory
14
128 Bytes
128 Bytes
Upper
Lower
FFH
7FH
80H
00H
Addressable by
Indirect
Adddressing Only
Addressable by
Direct and Indirect
Adddressing
256 Bytes
Internal
SRAM
MG84FL54B Data Sheet
Addressable by
Direct Adddressing
(SFRs)
SFRs
FFH
80H
023FH
0000H
On-chip expanded
576 Bytes RAM
Indirect External
Addressable by
Using MOVX
Addressing
(XRAM)
MEGAWIN
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