mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 15
mg84fl54
Manufacturer Part Number
mg84fl54
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
1.MG84FL54.pdf
(113 pages)
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Fig 5-3 Lower 128 Bytes of Internal RAM
5.3. On-chip expanded RAM (XRAM)
To access the on-chip expanded RAM (XRAM), refer to Fig 5-2, the 576 bytes of XRAM (0000H to 023FH) are
indirectly accessed by move external instruction, “MOVX @Ri” and “MOVX @DPTR”. For KEIL-C51 compiler, to
assign the variables to be located at XRAM, the “pdata” or “xdata” definition should be used. After being
compiled, the variables declared by “pdata” and “xdata” will become the memories accessed by “MOVX @Ri”
and “MOVX @DPTR”, respectively. Thus the MG84FL54B hardware can access them correctly.
5.4. Declaration Identifiers in a C51-Compiler
The declaration identifiers in a C51-compiler for the various MG84FL54B memory spaces are as follows:
sfr
Special Function Registers; CPU registers and peripheral control/status registers, accessible only via direct
addressing.
data
128 bytes of internal data memory space (00h~7Fh); accessed via direct or indirect addressing, using
instructions other than MOVX and MOVC. All or part of the Stack may be in this area.
idata
Indirect data; 256 bytes of internal data memory space (00h~FFh) accessed via indirect addressing using
instructions other than MOVX and MOVC. All or part of the Stack may be in this area. This area includes the
data area and the 128 bytes immediately above it.
pdata
Paged (256 bytes) external data or on-chip expanded RAM (XRAM); duplicates the classic 80C51 64KB
memory space addressed via the “MOVX @Ri” instruction. The MG84FL54B has 256 bytes of on-chip lowest
256 bytes xdata memory.
xdata
MEGAWIN
Four banks of 8
registers R0~R7
30H
20H
18H
10H
08H
00H
Lower 128 Bytes of
Bit Addressable
internal SRAM
Bank 3
Bank 2
Bank 1
Bank 0
MG84FL54B Data sheet
1FH
17H
0FH
7FH
2FH
07H
Reset value of
Stack Pointer
15
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