mg84fl54b Megawin Technology, mg84fl54b Datasheet - Page 68
mg84fl54b
Manufacturer Part Number
mg84fl54b
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
1.MG84FL54B.pdf
(94 pages)
- Current page: 68 of 94
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19.3. USB Special Function Registers
To activate the USB operation, the user should enable PLL (by setting bit ‘EN_PLL’) and enable USB function
(by setting bit ‘EN_USB’). Clearing bit ‘EN_USB’ will deactivate the USB operation and let the USB function
enter its power-down mode. These two control bits are contained in the CKCON2 register, as follows.
CKCON2 (Address=BFH, Clock Control Register 2)
EN_USB: USB function enable control bit. Set/Clear to enable/disable the USB function.
EN_PLL: PLL enable bit. 1: Enable; 0: Disable
PLL_RDY: It is a read only bit. If this bit is set, indicates the PLL had locked. If cleared, PLL is un-locked.
The special function registers which are dedicated to the USB operation are grouped in the external memory
address space and share the addresses 0xFF00 to 0xFFFF with the physical external data memory. That is, the
user should use the instruction “MOVX @DPTR” to access these USB SFRs.
19.3.1. USB SFR Memory Mapping
FFF8H
FFF0H
FFE8H
FFE0H
FFD8H
FFD0H
FFC8H
FFC0H
68
7
-
0/8
UADDR
DCON
0/8
6
-
1/9
EPINDEX
EPCON
IEN
UPCON
1/9
OSCDR0
5
2/A
TXSTAT
RXSTAT
UIE
SIOCTL
2/A
MG84FL54B Data Sheet
4
-
3/B
TXDAT
RXDAT
UIFLG
3/B
EN_USB
3
4/C
TXCON
RXCON
UIE1
4/C
EN_PLL
2
UIFLG1
5/D
5/D
PLL_RDY
1
6/E
TXCNT
RXCNT
6/E
CK_SEL
0
7/F
7/F
MEGAWIN
FFFFH
FFF7H
FFEFH
FFE7H
FFDFH
FFD7H
FFCFH
FFC7H
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