SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 48

• Manufacturer Part Number: SST34WA3283
• Description: 32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
• Manufacturer: Silicon Storage Technology, Inc.

Advance Information
©2007 Silicon Storage Technology, Inc.
FIGURE 17: Flash Toggle Bit Timings (During Embedded Algorithms)
FIGURE 18: Flash Latency with Boundary Crossing
Note: VA = Valid Address. Two Read cycles are required to determine status.
Note: Cxx indicates which clock triggers Dxx at the output. For example, C30 triggers D30.
A/DQ
A/DQ
Address (hex)
15
When the Embedded Algorithm operation is complete, the Data# Polling will output true data.
AVD# must toggle between data reads.
The figure shows that the device does not cross a bank when performing an erase or program operation.
The latency with boundary crossing happens at the 32-word boundary.
A
-A/DQ
20
15
BEF#
AVD#
RY/BY#
WE#
OE#
-A
-A/DQ
AVD#
16
CLK
0
0
(stays high)
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
C29
1D
T
T
D29
CH
OEH
00001Fh (00003Fh, 00005Fh, etc.). Address 000000H is also a boundary crossing.
32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
C30
1E
T
VA
VA
ACC
T
CE
Address boundary occurs every 32 words, beginning at address
D30
C31
1F
Status Data
T
OE
C31
1F
D31
48
latency
C31
1F
C32
20
D32
T
VA
VA
RACC
C32
21
D33
C33
Status Data
21
D34
C34
22
D35
S71358-01-000
C35
1358 F17.0
23
1358 F15.0
T
T
CEZ
OEZ
D36
11/07