SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 29
SST34WA3283
Manufacturer Part Number
SST34WA3283
Description
32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
Manufacturer
Silicon Storage Technology, Inc.
Datasheet
1.SST34WA3283.pdf
(76 pages)
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32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
TABLE 18: PSRAM Operation Mode Selection - Asynchronous
TABLE 19: PSRAM Bus Operation - Burst Mode
©2007 Silicon Storage Technology, Inc.
Mode
Word Read
Lower Byte Read
Upper Byte Read
Word Write
Lower Byte Write
Upper Byte Write
Output Disable/
No Operation
Deep Power-Down
Standby
Mode
Initial Burst Read
Subsequent Burst
Read
Initial Burst Write
Subsequent Burst
Write
No Operation
Standby
Deep Power-Down
1. The clock signal (CLK) must remain low in asynchronous operating mode.
2. BEF# and BES# cannot be low at the same time.
3. The device enters Deep Power-Down mode by driving the chip Enable Signal, BES#, from Low to High with bit 4 of the RCR set to
1. The Configuration Register is output during the initial burst operation (read or write). The following read or write operations are similar
2. BEF# and BES# cannot be low at the same time.
‘0’. The device remains in Deep Power-Down mode until BES# goes Low again and is held Low for TCW. The Device is reading and
programming the registers use CRES controlled method or the software method.
to subsequent burst operations. BES# must be held Low for the equivalent of a single-word burst operation
1
3
BES#
CLK
rising
rising
rising
rising
rising
V
V
V
V
V
V
IH
IH
IL
IL
IL
IL
2
1
Assert
AVD#
going
low
BES#
X
X
V
V
V
V
V
V
V
IH
IH
IL
IL
IL
IL
IL
2
WE#
V
V
V
X
X
AVD#
IH
IH
IL
V
V
V
V
X
X
X
IH
IH
IL
IL
OE#
V
V
V
V
V
V
V
X
X
IH
IH
IH
IH
IL
IL
IL
WE#
V
V
V
X
X
X
X
IH
IH
IL
UBS#
V
V
V
V
V
V
29
X
X
X
IH
IH
IL
IL
IL
IL
OE#
V
V
V
V
X
X
X
IH
IH
IH
IH
LBS#
V
V
V
V
V
V
X
X
X
IH
IH
UBS#/
IL
IL
IL
IL
LBS#
V
V
V
X
X
X
X
IL
IL
IL
CRES
V
V
V
V
V
V
V
X
X
IL
IL
IL
IL
IL
IL
IL
High-Z
Low-Z
WAIT
Amax -16
Address in
Address in
Address in
Address in
Address in
Address in
Valid
Valid
Valid
Valid
Valid
Valid
X
X
X
CRES
V
V
V
X
IL
IL
IL
Data in Valid
Address in/
Address in/
A/DQ7-0
Address in/Data out Valid
Address in/Data out Valid
Amax -16
Address in
Address in
Data out
Data out
High-Z
Valid
Valid
Advance Information
Valid
Valid
X
X
X
X
X
S71358-01-000
High-Z
High-Z
High-Z
Data in Valid
Data in Valid
Data in Valid
A/DQ15-8
Address in/
Address in/
A/DQ10-0
Address in
Address in
Data out
Data out
High-Z
High-Z
High-Z
High-Z
Valid
Valid
Valid
Valid
T18.0 1358
T19.0 1358
11/07
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