SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 40
SST34WA3283
Manufacturer Part Number
SST34WA3283
Description
32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
Manufacturer
Silicon Storage Technology, Inc.
Datasheet
1.SST34WA3283.pdf
(76 pages)
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Advance Information
TABLE 34: PSRAM Burst Read Cycle Timing Parameters
TABLE 35: PSRAM Asynchronous WRITE Cycle Timing Parameters
©2007 Silicon Storage Technology, Inc.
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
ACCS
AAVDS
AAHS
ASTS
AAHS
AASS
AWS
IACCS
BACCS
OES
BPHS
BEPS
BEWS
BEAS
BESS
HDS
BHZS
CWS
BDHS
OHZS
OLZS
SPS
BYWS
BEWS
BPHS
BVS
BWS
DHS
DSS
BHZS
BLZS
OEWS
VPLS
VPHS
1. All tests are performed with the outputs configured for the default setting of full drive strength (BCR[5:4]=00B).
2. Values are valid for T
3. A refresh opportunity must be provided every T
a) clocked BES# HIGH, or b) BES# HIGH for longer than 15ns.
Parameter
Address Access Time (Fixed Latency)
AVD# Access Time (Fixed Latency)
Initial Access Time (Variable Latency)
Burst Access Time (CLK Output Delay)
Address Hold from AVD# HIGH (Fixed Latency)
OE# LOW to Valid Output
BES# HIGH between Subsequent Burst or MIxed Model
Operations
BES# Low Pulse Width
BES# or AVD# LOW to WAIT Valid
BES# Access Time (Fixed Latency)
BES# Setup Time to Active CLK Edge
Hold Time from Active CLK Edge
BES# High to A/DQ and WAIT High-Z Output
CLK to WAIT Valid
Output HOLD from CLK
OE# High to A/DQ High-Z Output
OE# Low to Low-Z Output
Setup Time to Active CLK Edge
Parameter
Address Setup Time
Address Hold from AVD# HIGH
Address Setup to AVD# HIGH
Address Valid to End of Write
LBS#/UBS# Select to End of Write
BES# or AVD# Low to WAIT Valid
BES# HIGH between Subsequent Asynchronous Operations
BES# Low to AVD# HIGH
BES# Low to End of Write
Data Hold from Write Time
Data Write Setup Time
BES# High to WAIT High-Z Output
BES# Low to Low-Z Output
End Write to Low-Z Output
AVD# Pulse Width Low
AVD# Pulse Width High
CLK
3
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
(Min.) with no refresh collision.
32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
3
BEPS
. A refresh opportunity is satisfied by either of the following two conditions:
2
40
1
V
DD
= 1.7-1.95V
1
Min
10
3
1
7
3
3
5
2
V
54 MHz
DD
= 1.7-1.95V
Max
70
70
65
11
20
10
70
11
9
8
8
Min
10
70
70
70
20
10
10
0
2
1
6
7
0
5
5
Min
2
8
1
5
2
2
3
3
66 MHz
S71358-01-000
Max
Max
7.5
7.5
70
70
70
55
11
20
10
11
8
8
8
Units
T34.0 1358
Units
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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