IDT72T54252L6-7BB IDT, Integrated Device Technology Inc, IDT72T54252L6-7BB Datasheet - Page 32

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IDT72T54252L6-7BB

Manufacturer Part Number
IDT72T54252L6-7BB
Description
IC FIFO DDR/SDR QUAD/DUAL 324BGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
72Tr
Datasheet

Specifications of IDT72T54252L6-7BB

Function
Asynchronous
Memory Size
20K (1K x 20)
Access Time
3.8ns
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
324-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Other names
72T54252L6-7BB
CLAMP
determined by the contents of the boundary-scan register and selects the one-
bit bypass register to be connected between TDI and TDO. Before loading this
instruction, the contents of the boundary-scan register can be preset with the
SAMPLE/PRELOAD instruction. During this instruction, data can be shifted
through the bypass register from TDI to TDO without affecting the condition of
the outputs.
HIGH-IMPEDANCE
as well as three-state types) of an IC to a disabled (high-impedance) state and
selects the one-bit bypass register to be connected between TDI and TDO.
During this instruction, data can be shifted through the bypass register from TDI
to TDO without affecting the condition of the IC outputs.
IDT72T54242/72T54252/72T54262 2.5V QUAD/DUAL TeraSync
32K x 10 x 4/16K x 20 x 2, 64K x 10 x 4/32K x 20 x 2 and 128K x 10 x 4/64K x 20 x 2
The optional High-Impedance instruction sets all outputs (including two-state
The optional CLAMP instruction sets the outputs of an IC to logic levels
32
DDR/SDR FIFO
OFFSET READ
PAE/PAF flags. When reading the offset registers through this instruction, the
dedicated serial programming signals must be disabled.
OFFSET WRITE
the PAE/PAF flags. When writing the offset registers through this instruction, the
dedicated serial programming signals must be disabled.
BYPASS
functional mode and selects the one-bit bypass register to be connected
between TDI and TDO. The BYPASS instruction allows serial data to be
transferred through the IC from TDI to TDO without affecting the operation of
the IC.
This instruction is an alternative to serial reading the offset registers for the
This instruction is an alternative to serial programming the offset registers for
The required BYPASS instruction allows the IC to remain in a normal
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 11, 2009

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