AN2826 Freescale Semiconductor / Motorola, AN2826 Datasheet - Page 3

no-image

AN2826

Manufacturer Part Number
AN2826
Description
DDR-SDRAM Layout Considerations for MCF547x/8x Processors
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Thus, in terms of price/performance, DDR SDRAM has recently overtaken SDR SDRAM.
As detailed above, data transactions are enabled on the rising and falling edges of the clock cycle,
theoretically doubling the bandwidth of a DDR SDRAM based system as shown in
Therefore, the technology roadmap for SDRAM is to migrate to DDR SDRAM, initially utilizing memory
configurations that already exist for SDR SDRAM.
In these high bandwidth SSTL signalling systems, the focus is on the system designer to ensure that the
routing and termination of the address, control and data signals of the DDR SDRAM interface are such
that they minimize noise and signal slew. These areas have become far more critical because the SSLT_2
signalling system, used by DDR SDRAM, by it’s very nature (a set of balanced transmission lines
requiring both series and parallel termination) is far more sensitive to noise and signal slew than previous
SDR SDRAM signals. What may be new to system designers, and needs to be carefully considered, is the
idea of a termination or switching voltage, as well as the standard supply voltage for the DDR SDRAM.
For current DDR SDRAM the supply voltage is usually +2.5V, which is normally specified to operate at
a +/-5% supply tolerance. The system designer must also supply a termination (VTT) or reference voltage
(VREF) that is exactly halfway between VDD (supply +2.5V) and VSS (system ground 0V): an ideal
+1.25V. This voltage can either be derived from the supply voltage using discrete components, or an
integrated switching regulator with integrated MOSFETs. The latter is preferred, as well as one that is
implemented on the MCF547x/MCF548x validation board (schematics and gerbers for this board design
are available via the Freescale ColdFire website - www.freescale.com/coldfire). In volumes of 10K or
more, this switching regulator will add approximately $3-4 to the overall system cost. Apart from the
VREF supply, the only additional cost to a DDR SDRAM system is the addition of discrete termination
Freescale Semiconductor
Double data rate (DDR) SDRAM—SDRAM that latches command information on the rising
edge of the clock; data is driven/latched on both the rising and falling edges of the clock rather
than just the rising edge. This doubles data throughput rate without an increase in frequency.
Currently the DDR SDRAM price continues to close on SDR SDRAM, and DDR SDRAM is
already cheaper than SDR SDRAM in commodity densities, as shown in
Memory
DDR-SDRAM Layout Considerations for MCF547x/8x Processors, Rev. 1
SDR
DDR
Figure 2. SDR and DDR SDRAM Data Latching
SDRAM
DDR SDRAM
Figure 1. SDR vs. DDR SDRAM Pricing
256 Mb
256 Mb
Spot Price - June, 2004
Size
Source:
http://w w w .dramexchange.com
Config
32Mx8
32Mx8
133MHz
400MHz
Speed
$
$
Avg Price
Figure
5.00
4.80
Figure
DDR SDRAM Overview
1.
2.
3

Related parts for AN2826