AN2826 Freescale Semiconductor / Motorola, AN2826 Datasheet - Page 12

• Manufacturer Part Number: AN2826
• Description: DDR-SDRAM Layout Considerations for MCF547x/8x Processors
• Manufacturer: Freescale Semiconductor / Motorola

MCF547x/8x Validation Board DDR Layout
tracks between the MPU and the DDR SDRAM footprint (the four columns of through board connections
at a diagonal offset to the left of the MPU). If you look closely you will see that several of the signals have
extra path lengths built into the tracking. This is done by looping the signal path back onto itself two or
three times. Solid line bounding rectangles have been drawn around some of the more obvious examples.
This routing has been done deliberately to try to keep all the DDR SDRAM signal track lengths within
+/-1.25cm (500mil) of each other, thereby minimizing skew and delays between the MPU and DDR
SDRAM. Secondly, note that to the left of the DDR SDRAM DIMM footprint there are footprints for a
long line of termination resistor packs; flood filled under these is the power plane of VREF/VTT copper.
This flood filling minimizes voltage drift and allows bulk decoupling of the plane to reduce system
switching noise on this supply. To aid with the reduction of this switching noise behind the resistor pack
footprints are a set of by-pass/decoupling capacitor footprints. Each resistor pack has at least one by-pass
capacitor associated with it. Again, these capacitors contain COG or NPO dielectric material to absorb as
much switching noise as possible via self-resonance.
Figure 8. MCF547x/8x Validation Board Inner1 Layer
DDR-SDRAM Layout Considerations for MCF547x/8x Processors, Rev. 1
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