AN2826 Freescale Semiconductor / Motorola, AN2826 Datasheet - Page 14

• Manufacturer Part Number: AN2826
• Description: DDR-SDRAM Layout Considerations for MCF547x/8x Processors
• Manufacturer: Freescale Semiconductor / Motorola

MCF547x/8x Validation Board DDR Layout
plane for the PLL supply on the MCF57x/548x MPU, which has a dedicated and heavily filtered supply
to ensure there is a minimum of spurious noise that the PLL might incorrectly lock to.
Figure 10. MCF547x/8x Validation Board Bottom Layer
Figure 10
shows the bottom routing layer of the validation board. Here again much of the DDR SDRAM
tracking can be seen, as with the top layer, to allow modifications to be made more easily if need be. On
this layer in particular the looping of various track signals can clearly be seen, as with the top layer. Again,
the more obvious examples have been highlighted by the solid bounding boxes, to ensure a similar routing
delay on the critical DDR SDRAM control signals. This layer clearly shows the 22 ohm series termination
resistor pack footprints just to the left and above the MPU bounded by the rectangles made up of broken
lines. These resistors need to be close to the source of the signal, so they are placed on the underside of the
board as close as possible to the DDR SDRAM address bus, data bus, and control signals from the MPU.
This layer also clearly shows the routing via the logic analyzer connectors to the left of the MPU (please
see
Figure
6, the silkscreen layer where J11, J12, J13 and J16 show their location). Most customers can
avoid this to have the DDR SDRAM physically as close as possible to the MPU, which is recommended.
DDR-SDRAM Layout Considerations for MCF547x/8x Processors, Rev. 1
14
Freescale Semiconductor