CY28347 Cypress Semiconductor, CY28347 Datasheet - Page 8

• Manufacturer Part Number: CY28347
• Description: Universal Single-chip Clock Solution
• Manufacturer: Cypress Semiconductor

Document #: 38-07352 Rev. *C
Byte 8: Silicon Signature Register (all bits are Read-only)
Byte9: Dial-A-Frequency Control Register R
Dial-a-Frequency Feature
SMBus Dial-a-frequency feature is available in this device via
Byte7 and Byte9.
P is a PLL constant that depends on the frequency selection
prior to accessing the Dial-a-Frequency feature.
XXXXX
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@Pup
@Pup
FS(4:0)
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
Revision_ID3
Revision_ID2
Revision_ID1
Revision_ID0
Vender_ID3
Vender_ID2
Vender_ID1
Vender_ID0
R5, MSB
R4
R3
R2
R1
R0
DAF_ENB
Name
Name
96016000
Revision ID bit [3]
Revision ID bit [2]
Revision ID bit [1]
Revision ID bit [0]
Cypress’s Vendor ID bit [3]
Cypress’s VendorID bit [2]
Cypress’s Vendor ID bit [1]
Cypress’s Vendor ID bit [0]
Reserved
These bits are for programming the PLL’s internal R register. This access allows
the user to modify the CPU frequency at very high resolution (accuracy). All other
synchronous clocks (clocks that are generated from the same PLL, such as PCI)
remain at their existing ratios relative to the CPU clock.
R and N register mux selection. 0=R and N values come from the ROM. 1=data is
load from DAF (I2C) registers.
P
Spread Spectrum Clock Generation (SSCG)
Spread Spectrum is enabled/disabled via SMBus register Byte
1, Bit 6.
Table 9. Spread Spectrum Table
Mode
0
0
0
0
1
1
1
1
Description
Description
SST1
0
0
1
1
0
0
1
1
SST0
0
1
0
1
0
1
0
1
% Spread
±0.75%
±0.35%
±0.25%
CY28347
–1.5%
–1.0%
–0.7%
–0.5%
±0.5%
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