CY28347 Cypress Semiconductor, CY28347 Datasheet - Page 12

• Manufacturer Part Number: CY28347
• Description: Universal Single-chip Clock Solution
• Manufacturer: Cypress Semiconductor

Document #: 38-07352 Rev. *C
AC Parameters
Connection Circuit DDRT/C Signals
Parameter
REF
TDC
TPeriod
Tr/Tf
TCCJ
DDR
VX
VD
TDC
TPeriod
Tr/Tf
TSKEW
TCCJ
THPJ
TDelay
TSKEW
tstable
REF Duty Cycle
REF Period
REF Rise and Fall Times
REF Cycle-to-Cycle Jitter
Crossing Point Voltage of
DDRT/C
Differential Voltage Swing
DDRT/C(0:5) Duty Cycle
DDRT/C(0:5) Period
DDRT/C(0:5) Rise/Fall
Slew Rate
DDRT/C to Any DDRT/C
Clock Skew
DDRT/C(0:5)
Cycle-to-Cycle Jitter
DDRT/C(0:5) Half Period
Jitter
BUF_IN to Any DDRT/C
Delay
FBOUT to Any DDRT/C
Skew
All Clock Stabilization
from Power-up
DDRC
DDRT
Description
(continued)
69.8413
DD–0.2
0.5*VD
14.85
Min.
1.0
0.7
45
45
1
1
66 MHz
Figure 1. Differential DDR Termination
T
T
PCB
PCB
VDDD +
DD+0.2
0.5*VD
Max.
1000
±100
71.0
15.3
100
±75
100
4.0
0.6
1.5
55
55
3
4
69.8413
DD–0.2
0.5*VD
Min.
9.85
1.0
0.7
45
45
1
1
100 MHz
VDDD +
DD+0.2
0.5*VD
Max.
1000
±100
71.0
10.2
100
±75
100
4.0
0.6
1.5
55
55
3
4
100
69.8413
DD–0.2
0.5*VD
14.85
Min.
1.0
0.7
45
45
1
1
133 MHz
VDDD +
DD+0.2
0.5*VD
Max.
1000
±100
71.0
15.3
100
±75
100
4.0
0.6
1.5
55
55
3
4
69.8413
DD–0.2
0.5*VD
16 pF
16 pF
Min.
9.85
1.0
0.7
45
45
1
1
200 MHz
Measurement Point
Measurement Point
VDDD +
DD+0.2
0.5*VD
Max.
1000
±100
71.0
10.2
100
±75
100
4.0
0.6
1.5
55
55
3
4
Unit
V/ns 21
ms 12
ns 5,6,10
ns 10,21
ps 6,10,11,12
ns 14
ps 10,11,14
ps 10,11,14
ps 10,11,14
ns 6,10
ps 6,10
% 5,10,6
% 14
V 23
V 22
CY28347
Page 12 of 22
Notes