CY28347 Cypress Semiconductor, CY28347 Datasheet - Page 10

• Manufacturer Part Number: CY28347
• Description: Universal Single-chip Clock Solution
• Manufacturer: Cypress Semiconductor

Document #: 38-07352 Rev. *C
AC Parameters
Parameter
P4 Mode CPU at 0.7V
TDC
TPeriod
Tr/Tf
Delta Tr/Tf Rise/Fall Time Variation
TSKEW
TCCJ
Vcross
P4 Mode CPU at 1.0V
TDC
TPeriod
Differ-
ential Tr/Tf
Delta Tr/Tf Rise/Fall Time Variation
TSKEW
TCCJ
Vcross
SE-
DeltaSlew
K7 Mode
TDC
TPeriod
TLOW
Tf
TCCJ
VD
VX
Chipset
TDC
TPeriod
Notes:
14. Measured at VX between the rising edge and the following falling edge of the signal.
15. Determined as a fraction of 2*(Trise-Tfall)/(Trise+Tfall).
16. See figure 6 for 0.7V loading specification.
17. Measurement taken from differential waveform, from -0.35V to +0.35V.
18. The time specified is measured from when all VDD’s reach their respective supply rail (3.3V and 2.5V) till the frequency output is stable and operating within
19. Ideally the probes should be placed on the pins. If there is a transmission line between the test point and the pin for one signal of the pair (e.g., CPU), you should
20. Measured in absolute voltage, i.e., single-ended measurement.
21. Probes are placed on the pins, and measurements are acquired at 1.5V for 3.3V signals and at 1.25V for 2.5V, and 50% point for differential signals.
22. Measured at VX, or where subtraction of CLK–CLK# crosses 0 volts.
23. VD is the magnitude of the difference between the measured voltage level on a DDRT (and CPUCS_T) clock and the measured voltage level on its complementary
specifications.
add the same length transmission line to the other signal of the pair (e.g., AGP).
DDRC (and CPUCS_C) one.
CPUT/C Duty Cycle
CPUT/C Period
CPUT/C Rise and Fall
Times
Rise/Fall Matching
CPUT/C to CPUCS_T/C
Clock Skew
CPUT/C Cycle-to-Cycle
Jitter
Crossing Point Voltage
CPUT/C Duty Cycle
CPUT/C Period
CPUT/C Rise and Fall
Times
CPUT/C to CPUCS_T/C
Clock Skew
CPUT/C Cycle-to-Cycle
Jitter
Crossing Point Voltage
Absolute Single-ended
Rise/Fall Waveform
Symmetry
CPUOD_T/C Duty Cycle
CPUOD_T/C Period
CPUOD_T/C LOW Time
CPUOD_T/C Fall Time
CPUOD_T/C
Cycle-to-Cycle Jitter
Differential Voltage AC
Differential Crossover
Voltage
CPUCS_T/C Duty Cycle
CPUCS_T/C Period
Description
(continued)
14.85
14.85
14.85
Min.
175
280
175
510
500
2.8
0.4
45
45
45
45
15
.4
66 MHz
Vp+.6V
Max.
±250
1100
20%
15.3
15.3
15.5
15.3
700
125
100
150
430
467
125
100
150
760
325
1.6
55
55
55
55
Min.
9.85
9.85
9.85
10.0
175
280
175
510
500
2.8
0.4
45
45
45
45
.4
100 MHz
Vp+.6V
Max.
±250
1100
20%
10.2
10.2
10.2
10.5
700
125
100
150
430
467
125
100
150
760
325
1.6
55
55
55
55
Min.
7.35
7.35
7.35
1.67
7.35
175
280
175
510
500
0.4
45
45
45
45
.4
133 MHz
Vp+.6V
Max.
±250
1100
20%
7.65
7.65
7.65
7.65
700
125
100
150
430
467
125
100
150
760
325
1.6
55
55
55
55
Min.
4.85
4.85
4.85
4.85
175
280
175
510
500
2.8
0.4
45
45
45
45
.4
200 MHz
Vp+.6V
Max.
±250
1100
20%
467
700
125
100
150
430
125
100
150
760
325
5.1
5.1
5.1
1.6
5.1
55
55
55
55
Unit
mV 15.
mV 19
mV 23
nS 5,10,6,14
ns 5,6,10,14,15
ps 15,16
ps 10,15,16,18
ps 10,11,12,14,1
ps 6,10,11,12,14,
ps 10,11,19
ps 10,18
ps 10,11,12,14
ps 10,11,12,14
ps 20
ns 5,6,10
ns 5,6,10
ns 5,10,21
ps 6,10
ns 5,10,6
% 5,6,10,14,15
% 5,10,6,14
% 5,6,10
% 5,10,6
V 22
CY28347
Page 10 of 22
16,17
5
15
Notes