LM3S328-IRN20-A0T Luminary Micro, Inc., LM3S328-IRN20-A0T Datasheet - Page 39

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LM3S328-IRN20-A0T

Manufacturer Part Number
LM3S328-IRN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
3
Table 3-1. Memory Map (Sheet 1 of 2)
April 27, 2007
Memory
0x00000000
0x00004000
0x20000000
0x20001000
0x22000000
0x22020000
FiRM Peripherals
0x40000000
0x40001000
0x40004000
0x40005000
0x40006000
0x40007000
0x40008000
0x40009000
0x4000C000
0x4000D000
0x4000E000
0x40010000
Peripherals
0x40020000
0x40020800
0x40021000
Start
Memory Map
The memory map for the LM3S328 is provided in Table 3-1. In this manual, register addresses are
given as a hexadecimal increment, relative to the module’s base address as shown in the memory
map. See also Chapter 4, “Memory Map” in the ARM® Cortex™-M3 Technical Reference Manual.
0x00003FFF
0x1FFFFFFF
0x20000FFF
0x200FFFFF
0x2201FFFF
0x23FFFFFF
0x40000FFF
0x40003FFF
0x40004FFF
0x40005FFF
0x40006FFF
0x40007FFF
0x40008FFF
0x4000CFFF
0x4000DFFF
0x4000FFFF
0x4001FFFF
0x400207FF
0x40020FFF
0x40023FFF
0x4000BFFF
End
Description
On-chip flash
Reserved
Bit-banded on-chip SRAM
Reserved
Bit-band alias of 0x20000000 through 0x20000FFF
Reserved
Watchdog timer
Reserved for three additional watchdog timers (per FiRM
specification)
GPIO Port A
GPIO Port B
GPIO Port C
GPIO Port D
SSI
Reserved for three additional SSIs (per FiRM
specification)
UART0
UART1
Reserved for two additional UARTs (per FiRM
specification)
Reserved for future FiRM peripherals
I
I
Reserved
2
2
C Master
C Slave
a
a
a
a
a
a
a
Preliminary
a
For details on
registers, see ...
page 100
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page 184
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page 119
page 119
page 119
page 282
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page 241
page 241
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page 318
page 332
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LM3S328 Data Sheet
39

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