LM3S328-IRN20-A0T Luminary Micro, Inc., LM3S328-IRN20-A0T Datasheet - Page 14

• Manufacturer Part Number: LM3S328-IRN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

List of Registers
Register 20:
Register 21:
Inter-Integrated Circuit (I2C) Interface ........................................................................................ 306
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
14
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8..................................................... 304
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC .................................................... 305
I2C Master Slave Address (I2CMSA), offset 0x000 ................................................................ 319
I2C Master Control/Status (I2CMCS), offset 0x004................................................................. 320
I2C Master Data (I2CMDR), offset 0x008................................................................................ 325
I
I
I
I
I
I
I
I
I
I
I
I
I
2
2
2
2
2
2
2
2
2
2
2
2
2
C Master Timer Period (I2CMTPR), offset 0x00C ................................................................ 326
C Master Interrupt Mask (I2CMIMR), offset 0x010 ............................................................... 327
C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ...................................................... 328
C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ................................................ 329
C Master Interrupt Clear (I2CMICR), offset 0x01C ............................................................... 330
C Master Configuration (I2CMCR), offset 0x020 .................................................................. 331
C Slave Own Address (I2CSOAR), offset 0x000 .................................................................. 332
C Slave Control/Status (I2CSCSR), offset 0x004 ................................................................. 333
C Slave Data (I2CSDR), offset 0x008................................................................................... 335
C Slave Interrupt Mask (I2CSIMR), offset 0x00C ................................................................. 336
C Slave Raw Interrupt Status (I2CSRIS), offset 0x010......................................................... 337
C Slave Masked Interrupt Status (I2CSMIS), offset 0x014................................................... 338
C Slave Interrupt Clear (I2CSICR), offset 0x018 .................................................................. 339
Preliminary
April 27, 2007