LM3S328-IRN20-A0T Luminary Micro, Inc., LM3S328-IRN20-A0T Datasheet - Page 217

• Manufacturer Part Number: LM3S328-IRN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

April 27, 2007
Reset
Reset
Type
Type
Bit/Field
31:4
ADC Underflow Status (ADCUSTAT)
Offset 0x010
3
2
1
0
RO
RO
31
15
0
0
Register 7: ADC Underflow Status (ADCUSTAT), offset 0x018
This register indicates underflow conditions in the Sample Sequencer FIFOs. The corresponding
underflow condition can be cleared by writing a 1 to the relevant bit position.
RO
RO
30
14
0
0
reserved
Name
UV3
UV2
UV1
UV0
RO
RO
29
13
0
0
RO
RO
28
12
0
0
R/W1C
R/W1C
R/W1C
R/W1C
Type
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
reserved
Reset
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
RO
RO
24
Description
Reserved bits return an indeterminate value, and should
never be changed.
This bit specifies that the FIFO for Sample Sequencer 3 has
hit an underflow condition where the FIFO is empty and a
read was requested. The problematic read does not move
the FIFO pointers, and 0s are returned. This bit is cleared by
writing a 1.
This bit specifies that the FIFO for Sample Sequencer 2 has
hit an underflow condition where the FIFO is empty and a
read was requested. The problematic read does not move the
FIFO pointers, and 0s are returned. This bit is cleared by
writing a 1.
This bit specifies that the FIFO for Sample Sequencer 1 has
hit an underflow condition where the FIFO is empty and a
read was requested. The problematic read does not move the
FIFO pointers, and 0s are returned. This bit is cleared by
writing a 1.
This bit specifies that the FIFO for Sample Sequencer 0 has
hit an underflow condition where the FIFO is empty and a
read was requested. The problematic read does not move the
FIFO pointers, and 0s are returned. This bit is cleared by
writing a 1.
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
R/W1C
UV3
RO
19
0
3
0
LM3S328 Data Sheet
R/W1C
UV2
RO
18
0
2
0
R/W1C
UV1
RO
17
0
1
0
R/W1C
UV0
RO
16
0
0
0
217