LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 328
LM3S317-IQN20-A0T
Manufacturer Part Number
LM3S317-IQN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S317-IQN20-A0T.pdf
(379 pages)
- Current page: 328 of 379
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Pulse Width Modulator (PWM)
328
Bit/Field
31:
1
0
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C
This register provides a master control of the polarity of the PWM signals on the device pins. The
PWM signals generated by the dead-band block are active High; they can optionally be made
active Low via this register. Disabled PWM channels are also passed through the output inverter (if
so configured) so that inactive channels maintain the correct polarity.
PWM1Inv
PWM0Inv
reserved
Name
Type
R/W
R/W
RO
Reset
0
0
0
Preliminary
Description
never be changed.
When set, the generated PWM1 signal is inverted.
When set, the generated PWM0 signal is inverted.
Reserved bits return an indeterminate value, and should
May 4, 2007
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