LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 12

• Manufacturer Part Number: LM3S317-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

List of Registers
General-Purpose Input/Outputs (GPIOs) .................................................................................... 114
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
General-Purpose Timers .............................................................................................................. 152
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
12
GPIO Data (GPIODATA), offset 0x000 ................................................................................... 122
GPIO Direction (GPIODIR), offset 0x400 ................................................................................ 123
GPIO Interrupt Sense (GPIOIS), offset 0x404......................................................................... 124
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408.............................................................. 125
GPIO Interrupt Event (GPIOIEV), offset 0x40C....................................................................... 126
GPIO Interrupt Mask (GPIOIM), offset 0x410.......................................................................... 127
GPIO Raw Interrupt Status (GPIORIS), offset 0x414.............................................................. 128
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ........................................................ 129
GPIO Interrupt Clear (GPIOICR), offset 0x41C....................................................................... 130
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ................................................. 131
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500.............................................................. 132
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504.............................................................. 133
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508.............................................................. 134
GPIO Open Drain Select (GPIOODR), offset 0x50C............................................................... 135
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ...................................................................... 136
GPIO Pull-Down Select (GPIOPDR), offset 0x514.................................................................. 137
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518...................................................... 138
GPIO Digital Input Enable (GPIODEN), offset 0x51C ............................................................. 139
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ........................................... 140
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ........................................... 141
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ........................................... 142
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC........................................... 143
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ........................................... 144
GPIO Peripheral Identification 1(GPIOPeriphID1), offset 0xFE4 ............................................ 145
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ........................................... 146
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC........................................... 147
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .............................................. 148
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .............................................. 149
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .............................................. 150
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC.............................................. 151
GPTM Configuration (GPTMCFG), offset 0x000..................................................................... 164
GPTM TimerA Mode (GPTMTAMR), offset 0x004 .................................................................. 165
GPTM TimerB Mode (GPTMTBMR), offset 0x008 .................................................................. 166
GPTM Control (GPTMCTL), offset 0x00C............................................................................... 167
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .................................................................... 169
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C .......................................................... 171
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ..................................................... 172
GPTM Interrupt Clear (GPTMICR), offset 0x024..................................................................... 173
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ...................................................... 174
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C...................................................... 175
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ....................................................... 176
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 ....................................................... 177
GPTM TimerA Prescale (GPTMTAPR), offset 0x038.............................................................. 178
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ............................................................. 179
GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040................................................ 180
GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044................................................ 181
Preliminary
May 4, 2007