LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 295
![no-image](/images/no-image-200.jpg)
LM3S317-IQN20-A0T
Manufacturer Part Number
LM3S317-IQN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S317-IQN20-A0T.pdf
(379 pages)
- Current page: 295 of 379
- Download datasheet (3Mb)
May 4, 2007
Reset
Reset
Type
Type
Bit/Field
SSI Interrupt Clear (SSIICR)
Offset 0x020
31:2
1
0
RO
RO
31
15
0
0
Register 9: SSI Interrupt Clear (SSIICR), offset 0x020
The SSIICR register is the interrupt clear register. On a write of 1, the corresponding interrupt is
cleared. A write of 0 has no effect.
RO
RO
30
14
0
0
reserved
RORIC
Name
RTIC
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
W1C
W1C
RO
RO
27
11
RO
0
0
RO
RO
26
10
0
0
Reset
RO
RO
25
0
0
0
0
9
0
reserved
Preliminary
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
SSI Receive Time-Out Interrupt Clear
0: No effect on interrupt.
1: Clears interrupt.
SSI Receive Overrun Interrupt Clear
0: No effect on interrupt.
1: Clears interrupt.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
LM3S317 Data Sheet
RO
RO
18
0
2
0
RTIC
W1C
RO
17
0
1
0
RORIC
W1C
RO
16
0
0
0
295
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