LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 14

• Manufacturer Part Number: LM3S317-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

List of Registers
Register 25:
Register 26:
Register 27:
Universal Asynchronous Receiver/Transmitter (UART) ........................................................... 237
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Synchronous Serial Interface (SSI) ............................................................................................. 273
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
14
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ................................... 234
ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC ............................... 234
ADC Test Mode Loopback (ADCTMLB), offset 0x100 ............................................................ 235
UART Data (UARTDR), offset 0x000 ...................................................................................... 244
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 .............................. 246
UART Flag (UARTFR), offset 0x018 ....................................................................................... 248
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ................................................. 250
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ........................................... 251
UART Line Control (UARTLCRH), offset 0x02C ..................................................................... 252
UART Control (UARTCTL), offset 0x030................................................................................. 254
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ................................................ 255
UART Interrupt Mask (UARTIM), offset 0x038 ........................................................................ 256
UART Raw Interrupt Status (UARTRIS), offset 0x03C............................................................ 258
UART Masked Interrupt Status (UARTMIS), offset 0x040 ...................................................... 259
UART Interrupt Clear (UARTICR), offset 0x044...................................................................... 260
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0.......................................... 261
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4.......................................... 262
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8.......................................... 263
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ......................................... 264
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0.......................................... 265
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4.......................................... 266
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8.......................................... 267
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ......................................... 268
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0............................................. 269
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4............................................. 270
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8............................................. 271
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ............................................ 272
SSI Control 0 (SSICR0), offset 0x000 ..................................................................................... 285
SSI Control 1 (SSICR1), offset 0x004 ..................................................................................... 287
SSI Data (SSIDR), offset 0x008 .............................................................................................. 289
SSI Status (SSISR), offset 0x00C ........................................................................................... 290
SSI Clock Prescale (SSICPSR), offset 0x010 ......................................................................... 291
SSI Interrupt Mask (SSIIM), offset 0x014 ................................................................................ 292
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .................................................................... 293
SSI Masked Interrupt Status (SSIMIS), offset 0x01C.............................................................. 294
SSI Interrupt Clear (SSIICR), offset 0x020.............................................................................. 295
SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0.................................................. 296
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4.................................................. 297
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8.................................................. 298
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ................................................. 299
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0.................................................. 300
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4.................................................. 301
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8.................................................. 302
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ................................................. 303
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0..................................................... 304
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4..................................................... 305
Preliminary
May 4, 2007