AD6641 Analog Devices, AD6641 Datasheet - Page 8

• Manufacturer Part Number: AD6641
• Description: 250 MHz Bandwidth DPD Observation Receiver
• Manufacturer: Analog Devices

SPI TIMING REQUIREMENTS
Table 5.
Parameter
t
t
t
t
t
t
t
t
t
Timing Diagrams
AD6641
DS
DH
CLK
S
H
HIGH
LOW
EN_SDIO
DIS_SDIO
PD[11:0]
PCLK+
PCLK–
CLK+
CLK–
CLK+
CLK–
VIN±
Description
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the SCLK
Setup time between CSB and SCLK
Hold time between CSB and SCLK
SCLK pulse width high
SCLK pulse width low
Time required for the SDIO pin to switch from an input to an output relative to the SCLK falling edge
Time required for the SDIO pin to switch from an output to an input relative to the SCLK rising edge
OUTPUT DATA BUS
N – 1
t
CH
t
CL
SP_SCLK
N
SP_SDFS
Figure 3. Parallel CMOS Mode Output Interface Timing
t
A
Figure 4. SP_SDFS Propagation Delay
Figure 2. Input Interface Timing
N + 1
t
CPD
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t
SKEW
t
DSDFS
t
PCLK_CH
N + 2
t
N + 3
PCLK
N + 4
Limit
2
2
40
2
2
10
10
10
10
N + 5
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min