MT90871 Zarlink Semiconductor, MT90871 Datasheet - Page 6

• Manufacturer Part Number: MT90871
• Description: Flexible 8K Digital Switch (F8KDX)
• Manufacturer: Zarlink Semiconductor

6
Pin Description Table (continued)
LSTi0-15
C16o
C8o
FP16o
FP8o
LSTo0 - 15
LCSTo0-1
Name
K14, J13, J14, K13,
M14, J12, L14,
M13, L13, N14,
M12, N12, N13,
M11, L12, K12
M9
N10
P12
N11
B13, B14, D14,
C14, D12, E14,
D13, E13, E12,
F14, G14, G12,
F12, F13, H14,
G13
C12, B12
Coordinates
Package
Local Serial Input Streams 0 to 15 (5V Tolerant with internal pull-
down). These pins accept serial TDM data streams at a data-rate of:
•
•
•
•
The data-rate is independently programmable for each input stream.
C16o Output Clock (Three-state Output). A 16.384MHz clock output.
The clock falling edge or rising edge is aligned with the Local
frame boundary, and is determined by the COPOL bit of the Control
Register.
C8o Output Clock (Three-state Output). A 8.192MHz clock output. The
clock falling edge or rising edge is aligned with the Local frame boundary,
and is determined by the COPOL bit of the Control Register.
for 61ns at the frame boundary. The frame pulse, running at a 8KHz rate,
will be the same format (ST-BUS or GCI-BUS) as the input frame pulse
(FP8i).
Frame Pulse Output (Three-state Output). Frame pulse output is active
for 122ns at the frame boundary. The frame pulse, running at 8KHz rate,
will be the same style (ST-BUS or GCI-BUS) as the input frame pulse
(FP8i).
Local Serial Output Streams 0 to 15 (5V Tolerant Three-state
Outputs). These pins output serial TDM data streams at a data-rate of:
•
•
•
•
The data-rate is independently programmable for each output stream.
Refer to descriptions of the LORS and ODE pins for control of the output
High or High-Impedance state.
Local Output Channel High Impedance Control (5V Tolerant Three-state
Outputs).
Active high output enable which may be used to control external buffering
individually for a set of Local output streams on a per channel basis.
LCSTo0 is the output enable for LSTo[0, 2, 4, 6, 8, 10, 12, 14],
LCSTo1 is the output enable for LSTo[1, 3, 5, 7, 9, 11, 13, 15].
Refer to descriptions of the LORS and ODE pins for control of the output
High or High-Impedance state.
Frame Pulse Output (Three-state Output). Frame pulse output is active
16.384 Mb/s (with 256 channels per stream),
8.192 Mb/s (with 128 channels per stream),
4.096 Mb/s (with 64 channels per stream), or
2.048Mb/s (with 32 channels per stream).
16.384 Mb/s (with 256 channels per stream),
8.192 Mb/s (with 128 channels per stream),
4.096 Mb/s (with 64 channels per stream), or
2.048Mb/s (with 32 channels per stream).
Zarlink Semiconductor Inc.
Description
Data Sheet