MT90871 Zarlink Semiconductor, MT90871 Datasheet - Page 18

• Manufacturer Part Number: MT90871
• Description: Flexible 8K Digital Switch (F8KDX)
• Manufacturer: Zarlink Semiconductor

2.
The LCSTo0-1 outputs data at a constant data-rate of 16.384Mb/s, independent of the data-rate selected for
the individual output streams, LSTo0-15. Streams at data-rates lower than 16.384Mb/s will have the value of
the respective channel control bit repeated for the duration of the channel. The bit will be transmitted twice for
8.192Mb/s streams, four times for 4.096Mb/s streams and eight times for 2.048Mb/s streams. The channel
control bit is not repeated for 16.384Mb/s streams.
Examples are presented, with reference to Table 2:
3.
4.
Figure 13, Local Port External High Impedance Control Bit Timing (ST-Bus mode) shows the channel control
bits for LCSTo0 and LCSTo1 in one possible scenario which includes stream LSTo0 at a data-rate of
16.384Mb/s, LSTo1 at 8.192Mb/s, LSTo6 at 4.096Mb/s and LSTo7 at 2.048Mb/s. All remaining streams are
operated at a data-rate of 16.384Mb/s.
4.1.2
The Local Output Enable Bit (LE) of the Local Connection Memory has direct per-channel control on the high-
impedance state of the Local Output streams, LSTo0-15. Programming a LOW state will set the stream output
of the MT90871 to High Impedance for the duration of the channel period. See section 12.3 "Local Connection
Memory Bit Definition", for programming details.
The LCSTo0-1 outputs remain active.
18
LCSTo0 in advance of the Frame Boundary by three periods of output clock, C16o. Similarly, the
Channel Control Bit for LSTo15_Ch0 is advanced relative to the Frame Boundary by three periods of
C16o, on LCSTo1.
for Channel 0 will be transmitted during the C16o clock period nos. 2040, 2048, 8, 16, 24, 32, 40 and 48.
Channel 1 will be transmitted during the C16o clock period nos. 9 and 17.
The Channel Control Bit corresponding to Stream 14, Channel 0, LSTo14_Ch0, is transmitted on
With stream LSTo2 selected to operate at a data-rate of 2.048Mb/s, the value of the Channel Control Bit
With stream LSTo4 operated at a data-rate of 8.192Mb/s, the value of the Channel Control Bit for
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
1
2
3
4
Period
C16o
LORS Set HIGH
1
Table 2- LCSTo Allocation of Channel Control Bits to the Output Streams
0
2
4
6
8
10
12
14
0
2
4
6
8
10
3-3
Stream No.
3-1
3-3
3-2
Allocated
LCSTo0
1
3
5
7
9
11
13
15
1
3
5
7
9
11
LCSTo1
3-2
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 1
Ch 1
Ch 1
Ch 1
Ch 1
Ch 1
16Mb/s
Zarlink Semiconductor Inc.
Allocated Channel No.
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
8Mb/s
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
4Mb/s
2
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
Ch 0
2Mb/s
Frame
Boundary
Data Sheet