MT57V256H36E Micron Semiconductor Products, Inc., MT57V256H36E Datasheet - Page 12

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MT57V256H36E

Manufacturer Part Number
MT57V256H36E
Description
9Mb DDR SRAM 2.5V Vdd, HSTL Pipelined
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet
AC Test Conditions
NOTE:
256K x 36 2.5V V
MT57V256H36E_16_B.fm - Rev. B, Pub. 1/03
1. Q01 refers to output from address A0 + 0. Q02 refers to output from the next internal burst address following A0,
2. Outputs are disabled (High-Z) one clock cycle after a NOP.
3. The second NOP cycle is not necessary for correct device operation; however, at high-clock frequencies it may be
R/W#
CQ#
LD#
DQ
CQ
K#
C#
A
Input pulse levels . . . . . . . . . . . . . . . . . . 0.25V to 1.25V
Input rise and fall times . . . . . . . . . . . . . . . . . . . . 0.7ns
Input timing reference levels . . . . . . . . . . . . . . . . 0.75V
Output reference levels
ZQ for 50W impedance . . . . . . . . . . . . . . . . . . . . . . . 250W
Output load . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 5
K
C
etc.
required to prevent bus contention.
NOP
1
Qx
t KHKL
t
IVKH
DD
t KHCH
t KLKH
t AVKH t KHAX
, HSTL, Pipelined DDR SRAM
A0
READ
(burst of 4)
2
t KHCH
t KHKH
t KHIX
t CHQX1
t CHQV
3
t KHK#H
Q01
(Note 1)
. . . . . . . . . . . . . . . . . . . . . V
t CHQV
A1
READ
(burst of 4)
4
Q02
Q03
t CHQX
5
Q04
t CHQX
Q11
READ/WRITE Timing
t CQHQV
6
Q12
NOP
0.16µm Process
t KHKL
DD
Q13
t CQHQX
Q/2
Figure 6:
2.5V V
t KLKH
t CHQZ
7
Q14
NOP
(Note 3)
12
t KHKH
t CQHQZ
A2
DD
WRITE
(burst of 4)
8
t DVKH
t KHK#H
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t KHDX
, HSTL, PIPELINED DDR SRAM
SRAM
D21
t CHCQH
9
Output Load Equivalent
D22
t DVKH
V
ZQ
D23
t KHDX
REF
A3
WRITE
(burst of 4)
10
Figure 5:
D24
0.75V
250
D31
11
Z = 50
O
D32
D33
DON’T CARE
A4
READ
(burst of 4)
12
256K x 36
D34
©2003, Micron Technology Inc.
V
ADVANCE
DD
13
UNDEFINED
Q/2
50
Q41
t CQHQX1

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