WM8753 Wolfson Microelectronics plc, WM8753 Datasheet - Page 59

• Manufacturer Part Number: WM8753
• Description: HI FI AND TELEPHONY DUAL CODEC
• Manufacturer: Wolfson Microelectronics plc

WM8753L
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Table 53 Audio Data Format Control
Note: Right Justified mode does not support 32-bit data.
Table 54 BCLK and VXCLK Master Mode Rate Select
R4 (04h)
Digital
Audio
Interface
Format
R7 (07h)
Digital
Interface
Control
REGISTER
ADDRESS
ADDRESS
REGISTER
Audio
Hi-Fi
7
6
5
4
3:2
1:0
8:6
5:3
BIT
BIT
BCLKINV
MS
LRSWAP
LRP
WL[1:0]
FORMAT[1:0]
PBMODE [2:0]
BMODE [2:0]
LABEL
LABEL
0
0
0
0
10
10
000
000
DEFAULT
DEFAULT
Hi-Fi DAC BCLK invert bit (for master
and slave modes)
0 = BCLK not inverted
1 = BCLK inverted
Hi-Fi Interface Master / Slave Mode
Control
1 = Enable Master Mode
0 = Enable Slave Mode
Hi-Fi DAC Left/Right channel swap
1 = swap left and right DAC data in
audio interface
0 = output left and right data as normal
Hi-Fi DAC right, left and I
LRC polarity
1 = invert LRC polarity
0 = normal LRC polarity
Hi-Fi DAC DSP Mode – mode A/B select
1 = MSB is available on 1
edge after LRC rising edge (mode B)
0 = MSB is available on 2
edge after LRC rising edge (mode A)
Hi-Fi DAC Audio Data Word Length
11 = 32 bits (see Note)
10 = 24 bits
01 = 20 bits
00 = 16 bits
Hi-Fi DAC Audio Data Format Select
11 = DSP Mode
10 = I
01 = Left justified
00 = Right justified
Voice Interface Master mode VXCLK
rate select
000 : VXCLK = MCLK
001 : VXCLK = MCLK / 2
010 : VXCLK = MCLK / 4
011 : VXCLK = MCLK / 8
100 : VXCLK = MCLK / 16
HiFi Interface Master mode BCLK rate
select
000 : BCLK = MCLK
001 : BCLK = MCLK / 2
010 : BCLK = MCLK / 4
011 : BCLK = MCLK / 8
100 : BCLK = MCLK / 16
2
S Format
DESCRIPTION
DESCRIPTION
AI Rev 3.1 June 2004
Advanced Information
nd
st
2
BCLK rising
S modes –
BCLK rising
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