WM8753 Wolfson Microelectronics plc, WM8753 Datasheet - Page 14

• Manufacturer Part Number: WM8753
• Description: HI FI AND TELEPHONY DUAL CODEC
• Manufacturer: Wolfson Microelectronics plc

Advanced Information
Note:
1.
AUDIO INTERFACE TIMING – MASTER MODE
w
Test Conditions
DCVDD = 1.42V, DBVDD = AVDD = SPKRVDD = PLLVDD = 3.3V, DGND = AGND = PLLGND = 0V, T
fs = 48kHz, MCLK = 384fs, 24-bit data, unless otherwise stated.
PARAMETER
System Clock Timing Information
MODE/GPIO3 and CSB/GPIO5 to AVDD
and DCVDD power-up setup time
AVDD and DCVDD to MODE/GPIO3 and
CSB/GPIO5 hold time
DBVDD powerup to DCVDD or AVDD
powerup
Test Conditions
DCVDD = 1.42V, DBVDD = AVDD = HPVDD = SPKRVDD = PLLVDD = 3.3V, DGND = AGND = PLLGND = 0V, T
Slave Mode, fs = 48kHz, MCLK = 256fs, 24-bit data, unless otherwise stated.
PARAMETER
Audio Data Input Timing Information
LRC / VXFS propagation delay from BCLK / VXCLK falling
edge
ADCDAT / VXDOUT propagation delay from BCLK / VXCLK
falling edge
DACDAT / VXDIN setup time to BCLK / VXCLK rising edge
DACDAT / VXDIN hold time from BCLK / VXCLK rising edge
DBVDD must be supplied before or at same time as either DCVDD or AVDD to ensure MODE and CSB are defined
internally when power on reset is released
Figure 2 Digital Audio Data Timing – Master Mode (see Control Interface)
SYMBOL
t
t
pusetup
t
puhold
dbpu
SYMBOL
t
t
t
t
DDA
DST
DHT
DL
100
10
10
MIN
MIN
1
0
TYP
TYP
A
= +25
AI Rev 3.1 June 2004
MAX
MAX
10
10
o
C, Slave Mode
WM8753L
A
= +25
UNIT
ms
UNIT
us
us
ns
ns
ns
ns
o
14
C,