MCIMX27 Motorola Semiconductor Products, MCIMX27 Datasheet - Page 9

• Manufacturer Part Number: MCIMX27
• Manufacturer: Motorola Semiconductor Products

2.3
This section provides a brief text description of all the modules included in the i.MX27 device, arranged
in alphabetical order.
2.3.1
The 1-Wire module provides bi-directional communication between the ARM926 core and the Add-Only
Memory EPROM, DS2502. The 1-Kbit EPROM holds information about the battery and communicates
with the ARM926 Platform using the IP interface. Through the 1-Wire interface, the ARM926 acts as the
bus master while the DS2502 device is the slave. The 1-Wire peripheral does not trigger interrupts; hence
it is necessary for the ARM926 to poll the 1-Wire to manage the module. The 1-Wire uses an external pin
to connect to the DS2502. Timing requirements are met in hardware with the help of a 1 MHz clock. The
clock divider generates a 1 MHz clock that is used as a time reference by the state machine. Timing
requirements are crucial for proper operation, and the 1-Wire state machine and the internal clock provide
the necessary signal. The clock must be configured to approximately 1 MHz. You can then set the 1-Wire
register to send and receive bits over the 1-Wire bus.
2.3.2
The AIPI acts as an interface between the ARM Advanced High-performance Bus Lite. (AHB-Lite) and
lower bandwidth peripherals conforming to the IP bus specification Rev 2.0. There are two AIPI modules
in i.MX27 processor.
The following list summarizes the key features of the AIPI:
Freescale Semiconductor
Block Mnemonic
•
•
•
•
WDOG
WEIM
All peripheral read transactions require a minimum of two system clocks (R-AHB side) and all
write transactions require a minimum of three system clocks (R-AHB side).
The AIPI supports 8-bit, 16-bit, and 32-bit IP bus peripherals. Byte, half word, and full word reads
and writes are supported.
The AIPI supports multi-cycle accesses by providing 16-bit to 8-bit peripherals operations and
32-bit to both 16-bit and 8-bit peripherals operations.
The AIPI supports 31 external IP bus peripherals each with a 4-Kbyte memory map (a slot).
Module Descriptions
1-Wire Module
AHB-Lite IP Interface Module (AIPI)
Timer Module
Block Name
Watchdog
Wireless
Interface
External
Module
Table 2. Digital and Analog Modules (continued)
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Functional
Grouping
Peripheral
Preliminary—Subject to Change Without Notice
Interface
External
Memory
Timer
The WDOG module protects against system failures by
providing a method for the system to recover from unexpected
events or programming errors.
The Wireless External Module (WEIM) handles the interface to
devices external to chip, including generation of chip selects,
clock and control for external peripherals and memory. It
provides asynchronous and synchronous access to devices
with SRAM-like interface.
Functional Description and Application Information
Brief Description
2.3.37/26
2.3.38/26
Section/
Page
9