MCIMX27 Motorola Semiconductor Products, MCIMX27 Datasheet - Page 17

• Manufacturer Part Number: MCIMX27
• Manufacturer: Motorola Semiconductor Products

2.3.17
The IC Identification Module (IIM) provides an interface for reading and in some cases programming
and/or overriding identification and control information stored in on-chip fuse elements. The module
supports laser fuses (L-Fuses) or electrically-programmable poly fuses (e-Fuses) or both.
The IIM also provides a set of volatile software-accessible signals, which can be used for software control
of hardware elements not requiring non-volatility. The IIM provides the primary user-visible mechanism
for interfacing with on-chip fuse elements. Among the uses for the fuses are unique chip identifiers, mask
revision numbers, cryptographic keys, and various control signals requiring permanent non-volatility. The
IIM also provides up to 28 volatile control signals and an ability to generate a second 168-bit SCC key.
The IIM consists of a master controller, a software fuse value shadow cache, and a set of registers to hold
the values of signals visible outside the module. Up to eight arrays of fuses (L-Fuses and/or e-Fuses) are
associated with the IIM, but are instantiated outside of it.
The IIM is accessible via an 8-bit IP bus interface. An 8-bit interface is used because it matches the natural
width of the fuse arrays. All registers are 32-bit aligned to enable the module to be instantiated on IP buses
supporting only 32-bit peripherals. A subset of fuses, as well as the software-controlled volatile signals,
are capable of driving top-level nets within the SoC. These signals are hereinafter referred to as
Hardware-Visible Signals, or HW-Visible Signals. These signals are intended for feature enablement and
disablement and similar uses within the device.
Laser fuses can only be blown during chip manufacturing (at the wafer level). The e-Fuses may be blown
under software or JTAG control during the IC final test, in the customer’s factory, or in the field. They
include a mechanism to inhibit further blowing of fuses (write-protect) to support secure computing
environments. The fuse values may also be overridden by software without modifying the fuse element.
Similar to the write-protect functionality, the override functionality can also be permanently disabled. Fuse
banks may also be scan-inhibited on a per-bank basis to prevent reading and programming of fuses through
the JTAG interface.
2.3.18
The JTAG Controller (JTAGC) module supports debug access to the ARM926 Platform and tristate enable
of the I/O pads. The overall strategy is to achieve good test and debug features without increasing the pin
count and reducing the complexity of I/O muxing. The JTAG Controller is compatible with IEEE1149.1
Standard Test Access Port and Boundary Scan Architecture.
2.3.19
The Keypad Port (KPP) is designed to interface with a keypad matrix with 2-contact or 3-point contact
keys. KPP is designed to simplify the software task of scanning a keypad matrix. With appropriate
software support, the KPP is capable of detecting, debouncing, and decoding one or multiple keys pressed
simultaneously in the keypad. The KPP supports up to 8 × 8 external key pad matrix. Its port pins can be
used as general purpose I/O. Using an open drain design, the KPP includes glitch suppression circuit
design, multiple keys, long key, and standby key detection.
Freescale Semiconductor
IC Identification Module (IIM)
JTAG Controller (JTAGC)
Keypad Port (KPP)
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Preliminary—Subject to Change Without Notice
Functional Description and Application Information
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