MCIMX27 Motorola Semiconductor Products, MCIMX27 Datasheet - Page 5

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MCIMX27

Manufacturer Part Number
MCIMX27
Description
Manufacturer
Motorola Semiconductor Products
Datasheet

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A primary AHB MUX (PAHBMUX) module performs address decoding, read data muxing, bus
watchdog, and other miscellaneous functions for the primary AHB within the platform. A clock control
module (CLKCTL) is provided to support a power-conscious design methodology, as well as
implementation of several clock synchronization circuits.
2.1.1
The ARM926EJ-S complex includes 16-Kbyte Instruction and 16-Kbyte Data caches. The embedded
45-Kbyte SRAM (VRAM) can be used to avoid external memory accesses or it can be used for
applications. There is also a 24-Kbyte ROM for bootstrap code.
2.2
Table 2
cross-reference to each module’s section and page number goes directly to a more detailed module
description for additional information.
Freescale Semiconductor
Block Mnemonic
ARM926EJS
AUDMUX
1-Wire
AITC
CRM
AIPI
ATA
CSI
shows an alphabetical listing of the modules in the i.MX27 multimedia applications processor. A
Module Inventory
®
Memory System
1-Wire Interface
Technology(AT)
CMOS Sensor
Reset Module
ARM926EJ-S
Block Name
Digital Audio
AHB-Lite IP
Attachment
ARM9EJ-S
Multiplexer
Controller
Advanced
Clock and
Interface
Interface
Interrupt
Module
i.MX27 Data Sheet, Advance Information, Rev. 0.1
Reset Control
Connectivity
Connectivity
Bus Control
Bus Control
Functional
Multimedia
Multimedia
Grouping
Peripheral
Peripheral
Peripheral
Preliminary—Subject to Change Without Notice
Clock and
Interface
Table 2. Digital and Analog Modules
CPU
The 1-Wire module provides bi-directional communication
between the ARM926EJ-S and the Add-Only-Memory EPROM
(DS2502). The 1-Kbit EPROM is used to hold information
about battery and communicates with the ARM926 Platform
using the IP interface.
The AIPI acts as an interface between the ARM Advanced
High-performance Bus Lite. (AHB-Lite) and lower bandwidth
peripherals that conforms to the IP Bus specification, Rev 2.0.
AITC is connected to the primary AHB as a slave device. It
generates the normal and fast interrupts to the ARM926EJ-S
processor.
The ARM926EJ-S (ARM926) is a member of the ARM9 family
of general-purpose microprocessors targeted at multi-tasking
applications.
The ATA block is an AT attachment host interface. It interfaces
with IDE hard disc drives and ATAPI optical disc drives.
The AUDMUX interconnections allow multiple, simultaneous
audio/voice/data flows between the ports in point-to-point or
point-to-multipoint configurations.
The CRM generates clock and reset signals used throughout
the i.MX27 processor and also for external peripherals.
The CSI is a logic interface which enables the i.MX27
processor to connect directly to external CMOS sensors and a
CCIR656 video source.
Functional Description and Application Information
Brief Description
Section/
2.3.3/10
2.3.4/10
2.3.5/10
2.3.6/11
2.3.7/12
2.3.8/12
2.3.1/9
2.3.2/9
Page
5

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